## E.2 MULTIPLEXER-BASED FAST BINARY ADDERS

This section considers implementation of Manchester, carry-select, and carry- look-ahead based fast binary adders using multiplexers only.

*Fig. E.1* Block diagram of a Manchester adder.

## E.2.1 Multiplexer-Based Manchester Adder

In a binary addition, a carry *c*_{i} can be either generated at stage *i* or propagated from the preceding stage. A carry is generated at stage *i* if *x*_{i} and *y*_{i} are both 1, and a carry is propagated from stage *i−1* to stage *i+1* if only one of the operands (*x*_{i}, *y*_{i}) is 1 but not both [1]. Let *g*_{i} and *p*_{i} denote the carry generation and the propagation at stage *i*. These can be computed as:

where ⊕ denotes XOR operation. The carry *c*_{i+1} and the sum *s*_{i} at each stage are computed by:

Hence, an adder based on this principle consists of 3 sequential stages:

- PG-logic: compute all pairs of (
*g*_{i}, *p*_{i}) based on (E.1) and (E.2) in parallel;
- Carry-generator: computes all carries
*c*_{i+1} based on (E.3);
- Sum-generator: computes all sum bits