Consider a typical interconnection circuit shown in Fig. 16.42, where the 2 units A and B are connected in a pipeline. The handshake circuit enables the unit A to process the next data sample while the unit B processes the current data sample. Since unit B might take longer to finish or vice versa, an acknowledge signal is necessary to indicate when B has completed its task and is ready for the next data sample. The purpose of the handshake circuit is to ensure correct transmission of data samples and prevent any run away (overwriting of data) conditions.
There are two styles of interconnection circuits as shown in Fig. 16.43 , differing in their specifications relating the input and output signals. The specification for the STG in Fig. 16.43(a) is
and for that in Fig. 16.43(b) is
The first condition means that if the input sample is ready (), then start computation (). The requirement that the succeeding ...