Rapid System Prototyping with FPGAs

Index

A

AES, 160, 175, 222, 287

antifuse, 22–23

API, 199–201

APU, 204, 223–224, 241, 243–244, 257, 287

architecture, 3–5, 8, 11, 13–18, 20, 22, 24–26, 29, 32–39, 41–46, 53–55, 57–60, 72–73, 75, 78–79, 83, 92–93, 103–104, 106, 108, 110, 112, 115–122, 128–129, 138, 141, 146–147, 151, 153, 167–168, 173–176, 185–189, 192–196, 198, 202–203, 209, 211, 214–220, 222, 224, 233, 240–241, 243–244, 254, 257, 260, 263, 265, 272, 287

architecture and design phase, 37, 42, 44–46

archiving, 68, 245–247

ASIC, 10, 20, 49, 77, 82, 142, 167–169, 173, 262, 287, 294

ASSP, 8, 87, 287

asynchronous, 16, 26, 32, 48, 57, 104–106, 130, 156, 194, 260, 262–263, 265–266, 287, 294

asynchronous design, 104–105

B

ball grid arrays (BGAs), 88

behavioral simulation, 39, ...