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Microprocessor Theory and Applications with 68000/68020 and Pentium by M. Rafiquzzaman

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12

PENTIUM HARDWARE AND INTERFACING

In this chapter we describe hardware aspects of the Intel Pentium. Topics include Pentium pins and signals, timing diagrams, and memory and I/O interfacing techniques. Finally, design concepts associated with a Pentium-based voltmeter and Pentium-based microcomputer interface to a hexadecimal keyboard and a seven-segment display are covered.

12.1 Pentium Pins and Signals

The Pentium contains 273 pins packaged in a ceramic pin grid array (PGA). The pins are arranged in a 21 × 21 matrix. Figure 12.1 shows a selected group Pentium pins. Note that the pin diagram of the figure contains a total of 212 pins. The other pins (not shown in Figure 12.1) provide functions such as parity check for address / data, and cache control. Appendix H provides the pin diagram and a description of all the pins.

To explain Pentium's interface to EPROMs, SRAMs, and I/O in a simplified manner, a selected group of relevant pins and signals are included in Figure 12.1. The ‘#’ symbol at the end of the signal name or the ‘—’ symbol above a signal name indicates the active or asserted state when it is LOW. When the symbol ‘#’ is absent after the signal name or the symbol ‘—’ is absent above a signal name, the signal is asserted when HIGH. Pins labeled NC (not connected) must remain unconnected.

For reliable operation, unused inputs should be connected to an appropriate signal level. Unused active LOW inputs should be connected to Vcc. Unused active HIGH inputs should be ...

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