Hardware Design Verification: Simulation and Formal Method-Based Approaches

Chapter 2. Coding for Verification

Chapter Highlights:

• Functional correctness

• Timing correctness

• Simulation performance

• Portability and maintainability

• “Synthesizability,” “debugability,” and general tool compatibility

• Cycle-based simulation

• Hardware simulation/emulation

• Two-state and four-state simulation

• Design and use of a linter

The best way to reduce bugs in a design is to minimize the opportunities that bugs can be introduced—in other words, design with verification in mind. Once this objective is achieved, the next step is to maximize the simulation speed of the design. These two objectives can be accomplished right from the beginning with the cooperation of Hardware Descriptive Language (HDL) designers by introducing coding style rules ...