Chapter 12. Test Technology Trends in the Nanometer Age

Kwang-Ting (Tim) ChengUniversity of California, Santa Barbara, California

Wen-Ben JoneUniversity of Cincinnati, Cincinnati, Ohio

Laung-Terng (L.-T.) WangSynTest Technologies, Inc., Sunnyvale, California

About this Chapter

Over the past three decades, we have seen semiconductor manufacturing technology advance from 4 microns to 65 nanometers. The shrinkage of feature size has made a dramatic impact on design and test. Now, we can see system-on-chip (SOC) designs embed 100 million transistors running in the gigahertz range. Within the next decade, there will be designs containing a billion transistors. These designs can include all varieties of digital, analog, mixed-signal, memory, optical,

Get VLSI Test Principles and Architectures now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.