VLSI Digital Signal Processing Systems: Design and Implementation

E.1    INTRODUCTION

This appendix addresses implementation of fast binary adders and multipliers. In Section E.2, fast adders are designed based on Manchester, carry-select, and carry-look-ahead techniques. These adders differ from those in other textbooks in the sense that these are implemented using multiplexers only. Section E.3 addresses design of fast multipliers based on Wallace tree and Dadda multipliers.