DSP processors are designed to support repetitive, numerically intensive tasks . To this end, most DSP processors not only have a powerful data path, but also have the ability to move large amounts of data to and from memory quickly. Moreover, DSP processors provide special instruction sets to exploit hardware efficiency.
The two most important features of DSP processor architectures, the data path containing fast multiply-accumulate unit(s) and the multiple-access memory architectures , are addressed in this section. The N-tap finite-impulse- response (FIR) filter:
is used as a typical example in this section.
Pipelining (see Chapter 3) is often used to increase the performance of a processor. Almost all the processors on the market today use pipelining to some extent. However, in the process of improving performance, pipelining also makes programming difficult. In this section, two common programming techniques, referred to as time-stationary and data-stationary  coding, used for programming pipelined PDSPs, are discussed.
Only fixed-point DSP processor data paths are addressed in this section. They typically incorporate a multiplier, accumulators, an ALU (arithmetic logic unit), one or more shifters, operand registers, and other specialized units such as saturation arithmetic unit.