VLSI Digital Signal Processing Systems: Design and Implementation

1.5    BOOK OUTLINE

The chapters in this book present various approaches to improve the performance characteristics of DSP systems in terms of area, speed, power, and roundoff noise. Chapter 1 reviews various DSP algorithms, presents the computation requirements of current DSP systems, and describes various representations of DSP algorithms using block diagrams, signal flow graphs, and data-flow graphs. The remaining chapters can be grouped into three parts.

The first part of the book (chapters 2 to 7) addresses several high-level architectural transformations that can be used to design families of architectures for a given algorithm. These transformations include pipelining, retiming, unfolding, folding, and systolic array design methodology. The second part of the book (chapters 8 to 12) deals with high-level algorithm transformations such as strength reduction, look-ahead and relaxed look-ahead. Strength reduction transformations are applied to reduce the number of multiplications in convolution, parallel finite impulse response (FIR) digital filters, discrete cosine transforms (DCTs), and parallel rank-order filters. Look-ahead and relaxed look-ahead transformations are applied to design pipelined direct-form and lattice recursive digital filters and adaptive digital filters, and parallel recursive digital filters. This part of the book exploits the interplay between algorithm design and integrated circuit implementations. The third part of the book (chapters 13 to 18) addresses ...