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2. C. E. Leiserson, F. Rose, and J. Saxe, “Optimizing synchronous circuitry by retiming,” in 3rd Caltech Conference on VLSI, (Pasadena, CA), pp. 87–116, March 1983.

3. D. A. Schwartz and T. P. Barnwell, III, “A graph theoretic technique for the generation of systolic implementations for shift invariant flow graphs,” in Proc of ICASSP-84,(San Diego), Mar. 1984.

4. K. K. Parhi and D. G. Messerschmitt, “Pipeline interleaving and parallelism in recursive digital filters− part I: pipelining using scattered look-ahead and decomposition,”IEEE Trans. on Acoustics, Speech, and Signal Processing, pp. 1099–1117, July 1989.

5. K. K. Parhi and D. G. Messerschmitt, “Pipeline interleaving and parallelism in recursive digital filters–part II: pipelined incremental block filtering,” IEEE Trans. on Acoustics, Speech, and Signal Processing, pp. 1118–1134, July 1989.

6. H. H. Loomis, Jr. and B. Sinha, “High speed recursive digital filter realization,” Circuits, Systems, Signal Process., vol. 3, no. 3, pp. 267–294, 1984.

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8. A. G. Deczky, “Synthesis of recursive digital filters using the minimum p-error criterion,” IEEE Trans. ...

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