REFERENCES
1. D. Li, J. Song and Y. C. Lim, “A polynomial-time algorithm for designing digital filters with power-of-two coefficients,” in Proc. of IEEE International Symposium on Circuits and Systems, (Chicago, IL), pp. 84–87, May 1993.
2. C. L. Chen, K. Y. Khoo and A. N. Willson, Jr, “An improved polynomial time algorithm for designing digital filters with power-of-two coefficients,” in Proc. of IEEE International Symposium on Circuits and Systems, (Seattle, WA), pp. 223–226, May 1995.
3. D. A. Parker and K. K. Parhi, “Low-area/power parallel fir digital filter implementations,” Journal of VLSI Signal Processing, no. 1/2, pp. 75–92, Sept. 1997.
4. J.-G. Chung, Y.-B. Kim, H.-G. Jeong, K. K. Parhi, and Z. Wang, “Efficient parallel FIR filter implementations using frequency spectrum characteristics,” in IEEE International Symposium on Circuits and Systems, (Monterey, CA), vol. 5, pp. 354–358, June 1998.
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