VHDL

Appendix E

Unsolved Design Problems

1. Design a 4-bit adder using instances of full adder. How does the code differ for a 16-bit full adder with representation as integers.
2. Design a 16-bit adder for bit_vector inputs. Compare it with a 16-bit adder for std_logic_vector inputs.
3. Design a 4-bit full adder with overflow and carry signals.
4. Design a 4-bit BCD adder circuit.
5. Design a 2 × 2 multiplier circuit in VHDL.
6. Implement the Boolean function y = Σ (3,5,6,7) using 2:1 Multiplexer.
7. Design a 8:1 multiplexer using generate statements with 2:1 multiplexer as a component.
8. Design a VHDL entity d2t4 (2 to 4 decoder). Using a 2t4 decoder design a 4t16 decoder.
9. Design a 4-bit bidirectional shift register from a generic n-bit register.
10. Design a mod-8 bidirectional ...