VHDL 101

Chapter 4. Loop 2 – Going Deeper

The previous Loop introduced the Entity and Architecture structures in which the description of how our design connects to the outside world and how our design actually works is contained. This loop also introduced us to signals and what can be done to signals (in their concurrent form) and the concept of a test bench.

This Loop introduces the Process statement in which we can encapsulate sequential statements and use the variable construct (which behaves somewhat differently than the signal) and some of the myriad things that can be done in the “sequential” realm.

4.1. Introducing Processes, Variables, and Sequential Statements

Remember that concurrent statements are all “executed” simultaneously. This works extremely ...