You are previewing Verification of Systems and Circuits Using LOTOS, Petri Nets, and CCS.
O'Reilly logo
Verification of Systems and Circuits Using LOTOS, Petri Nets, and CCS

Book Description

A Step-by-Step Guide to Verification of Digital Systems

This practical book provides a step-by-step, interactive introduction to formal verification of systems and circuits. The book offers theoretical background and introduces the application of three powerful verification toolsets: LOTOS-based CADP, Petri nets–based PETRIFY, and CCS-based CWB. The book covers verification of modular asynchronous circuits, alternating-bit protocols, arbiters, pipeline controllers, up-down counters, and phase converters, as well as many other verification examples.

Using the given detailed examples, exercises, and easy-to-follow tutorials, complete with the downloadable toolsets available via referenced Web sites, this book serves as an ideal text in advanced undergraduate and graduate courses in computer science and electrical engineering. It is also valuable as a desktop reference for practicing verification engineers who are interested in verifying that designed digital systems meet specifications and requirements.

Table of Contents

  1. Cover Page
  2. Title Page
  3. Copyright
  4. Dedication
  5. Contents
  6. CHAPTER 1: Introduction
    1. 1.1 EVENT-BASED APPROACH
    2. 1.2 EVENT-BASED SYSTEMS
    3. 1.3 TYPES OF VERIFICATION
    4. 1.4 TOOLSETS USED
    5. 1.5 LEVEL-BASED APPROACH
    6. 1.6 OVERVIEW OF THE BOOK
    7. 1.7 REFERENCES
  7. CHAPTER 2: Processes
    1. 2.1 INTRODUCTION
    2. 2.2 EXAMPLES OF PROCESSES AND BASIC CONCEPTS
    3. 2.3 ABOUT PREFIXING
    4. 2.4 PROCESS GRAPHS
    5. 2.5 CHOICE OPERATOR
    6. 2.6 ANOTHER PROCESS EXAMPLE
    7. 2.7 EQUIVALENCES
    8. 2.8 LABELED TRANSITION SYSTEMS (LTSs)
    9. 2.9 PARALLEL OPERATORS
    10. 2.10 SEQUENTIAL COMPOSITION
    11. 2.11 FURTHER READING
    12. 2.12 SELECTED SOLUTIONS
    13. 2.13 REFERENCES
  8. CHAPTER 3: From Digital Hardware to Processes
    1. 3.1 THE C-ELEMENT
    2. 3.2 THE XOR-GATE
    3. 3.3 TOGGLES
    4. 3.4 MODULO- N TRANSITION COUNTERS
    5. 3.5 MODULAR NETWORKS
    6. 3.6 PROPOSITIONAL LOGIC: A REVIEW OF KNOWN CONCEPTS
    7. 3.7 SELECTED SOLUTIONS
    8. 3.8 REFERENCES
  9. CHAPTER 4: Introducing LOTOS
    1. 4.1 FROM BLOT TO BASIC LOTOS
    2. 4.2 SOME SEMANTICS
    3. 4.3 FROM LTS TO LOTOS
    4. 4.4 COMPARING PARALLEL OPERATORS
    5. 4.5 SEQUENTIAL COMPOSITION
    6. 4.6 HIDING
    7. 4.7 EQUIVALENCES AND PREORDERS
    8. 4.8 ABOUT CADP
    9. 4.9 FULL LOTOS—AN INTRODUCTION
    10. 4.10 THE REGULAR MU-CALCULUS (RMC)
    11. 4.11 FURTHER READING
    12. 4.12 SELECTED SOLUTIONS
    13. 4.13 REFERENCES
  10. CHAPTER 5: Introducing Petri Nets
    1. 5.1 ABOUT PETRI NETS
    2. 5.2 ABOUT LANGUAGES
    3. 5.3 ABOUT PETRIFY
    4. 5.4 ILLUSTRATING PETRI NETS
    5. 5.5 LABELED NETS
    6. 5.6 BOUNDED NETS
    7. 5.7 OBSERVATION EQUIVALENCE OF LPNS
    8. 5.8 FROM BLOT TO PETRI NETS
    9. 5.9 LIVENESS AND PERSISTENCE
    10. 5.10 SIMPLE REDUCTION RULES
    11. 5.11 MARKED GRAPHS
    12. 5.12 A SIMPLE NET ALGEBRA
    13. 5.13 ARC-WEIGHTED NETS
    14. 5.14 READERS–WRITERS SYSTEM
    15. 5.15 INHIBITOR NETS
    16. 5.16 TRUE CONCURRENCY
    17. 5.17 FURTHER READING
    18. 5.18 SELECTED SOLUTIONS
    19. 5.19 REFERENCES
  11. CAHPTER 6: Introducing CCS
    1. 6.1 ABOUT CCS
    2. 6.2 OPERATORS ‘PREFIX’ AND ‘SUM’
    3. 6.3 RECURSION
    4. 6.4 CONCURRENCY OPERATOR
    5. 6.5 EQUIVALENCES
    6. 6.6 RESTRICTION
    7. 6.7 CTL
    8. 6.8 THE CONCURRENCY WORKBENCH (CWB)
    9. 6.9 CCS AND CWB APPLICATION EXAMPLES
    10. 6.10 FURTHER READING
    11. 6.11 SELECTED SOLUTIONS
    12. 6.12 REFERENCES
  12. CHAPTER 7: Verification of Modular Asynchronous Circuits
    1. 7.1 ABOUT ASYNCHRONOUS CIRCUITS
    2. 7.2 XOR-GATES
    3. 7.3 CEL-CIRCUIT
    4. 7.4 OTHER MODULES
    5. 7.5 MODULE EXTENSIONS
    6. 7.6 MODULAR NETWORKS
    7. 7.7 REALIZATIONS
    8. 7.8 VERIFICATION OF EXTENDED MODULES
    9. 7.9 VERIFICATION OF PARALLEL CONTROL STRUCTURES
    10. 7.10 FURTHER READING
    11. 7.11 SELECTED SOLUTIONS
    12. 7.12 REFERENCES
  13. CHAPTER 8: Verification of Communication Protocols
    1. 8.1 INTRODUCTION
    2. 8.2 TWO SIMPLE COMMUNICATION PROTOCOLS
    3. 8.3 THE ALTERNATING BIT (AB) PROTOCOL
    4. 8.4 FURTHER READING
    5. 8.5 SELECTED SOLUTIONS
    6. 8.6 REFERENCES
  14. CHAPTER 9: Verification of Arbiters
    1. 9.1 INTRODUCTION
    2. 9.2 A RANDOM ARBITER (RGDA)
    3. 9.3 A TOKEN-RING ARBITER
    4. 9.4 FURTHER READING
    5. 9.5 SELECTED SOLUTIONS
    6. 9.6 REFERENCES
  15. CHAPTER 10: More Verification Case Studies
    1. 10.1 VERIFICATION OF COMBINATIONAL LOGIC
    2. 10.2 VERIFICATION OF ASYNCHRONOUS PIPELINE CONTROLLERS
    3. 10.3 VERIFICATION OF PRODUCER–CONSUMER SYSTEMS
    4. 10.4 VERIFICATION BASED ON DESIGN APPROACHES
    5. 10.5 VERIFICATION OF TOGGLES AND TRANSITION COUNTERS
    6. 10.6 VENDING MACHINES VERIFICATION—REVISITED
    7. 10.7 PI-REALIZATIONS
    8. 10.8 A COMPARISON OF EQUIVALENCE RELATIONS
    9. 10.9 SELECTED SOLUTIONS
    10. 10.10 REFERENCES
  16. CHAPTER 11: Guide to Further Studies
    1. 11.1 VERIFICATION OF TELECOMMUNICATION SYSTEMS
    2. 11.2 VERIFICATION USING COLORED PETRI NETS
    3. 11.3 VERIFICATION OF TRAFFIC SIGNAL CONTROL SYSTEMS
    4. 11.4 REFERENCES
  17. INDEX