5.3. PIT's Interrupt Service Routine

Once the IRQ0 interrupt gate has been initialized, the handler field of IRQ0's irqaction descriptor contains the address of the timer_interrupt( ) function. This function starts running with the interrupts disabled, since the status field of IRQ0's main descriptor has the SA_INTERRUPT flag set. It performs the following steps:

  1. If the CPU has a TSC register, it performs the following substeps:

    1. Executes an rdtsc Assembly instruction to store the value of the TSC register in the last_tsc_low variable

    2. Reads the state of the 8254 chip device internal oscillator and computes the delay between the timer interrupt occurrence and the execution of the interrupt service routine[2]

      [2] The 8254 oscillator drives a counter that is continuously decremented. When the counter becomes 0, the chip raises an IRQ0. So reading the counter indicates how much time has elapsed since the interrupt occurred.

    3. Stores that delay (in microseconds) in the delay_at_last_interrupt variable

  2. It invokes do_timer_interrupt( ).

do_timer_interrupt( ), which may be considered as the interrupt service routine common to all 80x86 models, executes the following operations:

  1. It invokes the do_timer( ) function, which is fully explained shortly.

  2. If an adjtimex( ) system call has been issued, it invokes the set_rtc_mmss( ) function once every 660 seconds, that is, every 11 minutes, to adjust the Real Time Clock. This feature helps systems on a network synchronize their clocks (see Section 5.5.2 ...

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