Introduction to the Debug and Trace Features
Abstract
This chapter starts with a introduction to the debug and trace connections, and the debug and trace features available in the Cortex®-M processor family. It then covers the details of the debug architecture including debug system design, debug modes (halting and debug monitor exception), debug events, and introduction of each debug components in the ARM® Cortex®-M3/M4 system.
Keywords
Debug; JTAG; Serial Wire; Trace; CoreSight™; halt; event; Serial Wire Viewer (SWV); watchpoint; breakpoint; profiling; vector catch
Chapter Outline
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