Chapter 3. 3-D Integrated Circuit Fabrication Technologies

A system-in-package (SiP) offers a large number of advantages over the traditional 2-D SoC, such as shorter off-chip interconnect lengths, increased packaging efficiency, and higher transistor density. These advantages provide significant performance improvements over SoC. Manufacturing issues, however, limit the scaling of the interchip interconnects, such as the wire bonds and solder balls, within an SiP. In addition, the inevitable increase in the delay of on-chip interconnects is not alleviated by SiP interconnect technologies. Although an SiP employing coarse grain through silicon vias can improve this delay, the lower density and impedance characteristics of these vertical interconnects ...

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