The Genesis of SMM

Intel® first implemented SMM in the 386SL processor and has not changed very much since then. While it was not present in the earlier 486 models, it was implemented in all of the later models of the 486 and in all subsequent IA32 processors. In all IA32 processors, SMM is entered by generating an SMI (System Management Interrupt) to the processor. Prior to the P54C version of the Pentium® processor, the chipset could only deliver the interrupt to the processor by asserting the processor's SMI# input pin. Starting with the P54C (which was the first IA32 processor to incorporate the Local APIC module) and up to and including the Pentium® III processor, the chipset could also deliver the interrupt to the processor by sending an ...

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