The Unabridged Pentium 4 IA32 Processor Genealogy

Last Branch, Interrupt, and Exception Recording

P6 processors implemented four MSRs used to record the last two branches taken as a result of a branch, exception, or an interrupt (see “The Branch, Exception, Interrupt Recording Facility” on page 623).

The Pentium® 4 implements the following additional capabilities:

• New. Two 32-bit MSRs (MSR_LER_To_LIP and MSR_LER_From_LIP) that duplicate the functions of the P6's LastExceptionToIP and LastExceptionFromIP MSRs. These two MSRs contain a branch record for the last branch the processor took prior to an exception or interrupt being generated.

• New. Last Branch Record Stack (LBR Stack) consists of a circular stack of four MSRs (MSR_LASTBRANCH_0 through MSR_LASTBRANCH_3) and a TOS (Top of Stack) pointer ...