Chapter 51. Pentium® 4 FSB Response and Data Phases

The Previous Chapter

This chapter provided a detailed description of the Snoop Phase of a FSB transaction. It included:

  • Agents Involved in the Snoop Phase.

  • The Snoop Phase Has Two Purposes.

  • The Snoop Result Signals are Shared, DEFER# Isn't.

  • The Snoop Phase Duration Is Variable.

  • There Is No Snoop Stall Duration Limit.

  • Memory Transaction Snooping.

  • The Snoop's Effects on Processor Caches.

  • Self-Snooping.

  • Non-Memory Transactions Have a Snoop Phase.

This Chapter

This chapter provides a detailed description of the Response and Data Phases of a FSB transaction. It includes:

  • The Purpose of the Response Phase.

  • The Response Phase Signal Group.

  • The Response Phase Start Point.

  • The Response Phase End Point.

  • The Response ...

Get The Unabridged Pentium 4 IA32 Processor Genealogy now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.