HT and the Microcode Update Feature
Refer to “MicroCode Update Feature” on page 631 for a description of the Microcode Update feature.
In an HT-capable processor, the microcode and Microcode Update feature are shared between the logical processors. Code executing on either logical processor can initiate a microcode update. When an update is performed on either logical processor, the update signature of that update is reflected in the IA32_BIOS_SIGN_ID MSRs of both logical processors.
If the threads executing on both logical processors initiate an update simultaneously, the core ensures that the updates are performed one at a time.
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