Hyper-Threading Option
On the trailing-edge of reset, the processor samples its A31# input to determine whether to enable or disable its Hyper-Threading feature:
Sampling A31# low disables Hyper-Threading. In this case, logical processor 1 and its Local APIC are disabled for the power-up session and logical processor 0 is the only operational processor within the physical processor package.
Sampling A31# high enables Hyper-Threading. In this case, logical processors 0 and 1 and their Local APICs are enabled for the power-up session.
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