The WCBs Were Enhanced

For a complete description of the Write Combining memory type and the WCBs, refer to “The Memory Types” on page 581.

The Pentium® Pro and Pentium® II processors had four cache line fill buffers to handle the data returned from FSB line reads caused by cache misses. At a given moment in time, one of the fill buffers could be used as a WCB.

The Pentium® III design also implements four cache line fill buffers, but it can use any or all of them, when necessary, as WCBs. Of course, any of the buffers awaiting cache line data from outstanding FSB memory transactions cannot be used as WCBs. Conversely, any of the buffers currently in use as WCBs could not be used to accept cache line fill data from memory.

While the Pentium® Pro ...

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