Caching-Related Changes to the Programming Environment
The 486 made the following changes to the programming environment:
The CD (Cache Disable) and the NW (Not Write Through) bits were added to CR0 (see Figure 19-2 on page 434). These two bits provide high-level control of the internal cache(s). Also refer to Table 19-7 on page 455.
Table 19-7. CR0[CD] and CR0[NW] Control the Cache CD NW Description 0 0 The cache is fully enabled. 0 1 Reserved. 1 0 The cache is enabled but is locked: Lines already cached will remain cached.
No new lines will be read into the cache.
A memory write hit on a line in the cache will update the cache line and is also written through to memory.
Any memory access initiated on the FSB by another entity will be snooped in the cache. ...
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