Cache Real Estate Management

The Lookup

When a cache miss occurs, a new line must be fetched from memory and placed in the cache. Refer to Figure 17-4 on page 404. Assume that a memory address was submitted to the cache for a lookup and, as shown in the illustration, the Line portion of the address selected set 3 in the directories (i.e., the set of four directory entries at offset 3 in each of the four directories). Assume that all four of the entries are valid, that the cache is a MESI cache (i.e., a WB cache), and that the four entries contain the following:

  • Entry 3 in Directory 0 contains a Page address of 0349A03h and its 2-bit State field indicates that the line is in the E (Exclusive) state. This means that the cache contains line 3 from ...

Get The Unabridged Pentium 4 IA32 Processor Genealogy now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.