The System Designer's Guide to VHDL-AMS

The System Designer's Guide to VHDL-AMS

by Peter J. Ashenden, Gregory D. Peterson, Darrell A. Teegarden
Released September 2002
Publisher(s): Morgan Kaufmann
ISBN: 9780080518367

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Book description

The demand is exploding for complete, integrated systems that sense, process, manipulate, and control complex entities such as sound, images, text, motion, and environmental conditions. These systems, from hand-held devices to automotive sub-systems to aerospace vehicles, employ electronics to manage and adapt to a world that is, predominantly, neither digital nor electronic. To respond to this design challenge, the industry has developed and standardized VHDL-AMS, a unified design language for modeling digital, analog, mixed-signal, and mixed-technology systems. VHDL-AMS extends VHDL to bring the successful HDL modeling methodology of digital electronic systems design to these new design disciplines.Gregory Peterson and Darrell Teegarden join best-selling author Peter Ashenden in teaching designers how to use VHDL-AMS to model these complex systems. This comprehensive tutorial and reference provides detailed descriptions of both the syntax and semantics of the language and of successful modeling techniques. It assumes no previous knowledge of VHDL, but instead teaches VHDL and VHDL-AMS in an integrated fashion, just as it would be used by designers of these complex, integrated systems.

  • Explores the design of an electric-powered, unmanned aerial vehicle system (UAV) in five separate case studies to illustrate mixed-signal, mixed-technology, power systems, communication systems, and full system modeling.

Table of contents

  1. Cover image
  2. Title page
  3. Table of Contents
  4. The Morgan Kaufmann Series in Systems on Silicon
  5. Copyright
  6. Dedication
  7. Preface
  8. Chapter 1: Fundamental Concepts
    1. 1.1 Modeling Systems
    2. 1.2 Domains and Levels of Modeling
    3. 1.3 Modeling Languages
    4. 1.4 VHDL-AMS Modeling Concepts
    5. 1.5 Learning a New Language: Lexical Elements and Syntax
  9. Chapter 2: Scalar Data Types, Natures and Operations
    1. 2.1 Constants and Variables
    2. 2.2 Scalar Types
    3. 2.3 Type Classification
    4. 2.4 Scalar Natures
    5. 2.5 Attributes of Scalar Types and Natures
    6. 2.6 Expressions and Operators
  10. Chapter 3: Sequential Statements
    1. 3.1 If Statements
    2. 3.2 Case Statements
    3. 3.3 Null Statements
    4. 3.4 Loop Statements
    5. 3.5 Assertion and Report Statements
  11. Chapter 4: Composite Data Types and Operations
    1. 4.1 Arrays
    2. 4.2 Unconstrained Arrays
    3. 4.3 Array Operations and Referencing
  12. Chapter 5: Digital Modeling Constructs
    1. 5.1 Entity Declarations
  13. Chapter 6: Analog Modeling Constructs
    1. 6.1 Free Quantities
    2. 6.2 Terminals and Branch Quantities
    3. 6.3 Attributes of Terminals and Quantities
    4. 6.4 Simultaneous Statements
    5. 6.5 Analog Structural Descriptions
    6. 6.6 Discontinuities and Break Statements
    7. 6.7 Step Limit Specifications
    8. 6.8 Mixed-Signal Descriptions
    9. 6.9 Mixed-Technology Descriptions
    10. Exercises
  14. Chapter 7: Design Processing
    1. 7.1 Analysis
    2. 7.2 Elaboration
    3. 7.3 Execution
  15. Chapter 8: Case Study 1: Mixed-Signal Focus
    1. 8.1 System Overview
    2. 8.2 Command and Control System Design
    3. 8.3 Design Trade-Off Analysis
  16. Chapter 9: Subprograms
    1. 9.1 Procedures
    2. 9.2 Procedure Parameters
    3. 9.3 Concurrent Procedure Call Statements
    4. 9.4 Functions
    5. 9.5 Simultaneous Procedural Statements
    6. 9.6 Overloading
    7. 9.7 Visibility of Declarations
  17. Chapter 10: Packages and Use Clauses
    1. 10.1 Package Declarations
    2. 10.2 Package Bodies
    3. 10.3 Use Clauses
    4. 10.4 The Predefined Package Standard
    5. 10.5 IEEE Standard Packages
  18. Chapter 11: Aliases
    1. 11.1 Aliases for Data Objects
    2. 11.2 Aliases for Non-Data Items
  19. Chapter 12: Generic Constants
    1. 12.1 Parameterizing Behavior
    2. 12.2 Parameterizing Structure
  20. Chapter 13: Frequency and Transfer Function Modeling
    1. 13.1 Frequency-Based Modeling
    2. 13.2 Noise Modeling
    3. 13.3 Laplace Transfer Functions
    4. 13.4 Discrete Transfer Functions and Sampling
  21. Chapter 14: Case Study 2: Mixed-Technology Focus
    1. 14.1 Rudder System Overview
    2. 14.2 S-Domain Implementation
    3. 14.3 Mixed Mechanical/S-Domain Implementation
    4. 14.4 Design Trade-Off Analysis
  22. Chapter 15: Resolved Signals
    1. 15.1 Basic Resolved Signals
    2. 15.2 IEEE Std_Logic_1164 Resolved Subtypes
    3. 15.3 Resolved Signals and Ports
    4. 15.4 Resolved Signal Parameters
    5. Exercises
  23. Chapter 16: Components and Configurations
    1. 16.1 Components
    2. 16.2 Configuring Component Instances
    3. 16.3 Configuration Specifications
  24. Chapter 17: Generate Statements
    1. 17.1 Generating Iterative Structures
    2. 17.2 Conditionally Generating Structures
    3. 17.3 Configuration of Generate Statements
  25. Chapter 18: Case Study 3: DC-DC Power Converter
    1. 18.1 Buck Converter Theory and Design
    2. 18.2 Modeling with VHDL-AMS
    3. 18.3 Voltage-Mode Control
    4. 18.4 Averaged Model
    5. 18.5 Closing the Loop
    6. 18.6 Design Trade-Off Study
  26. Chapter 19: Guards and Blocks
    1. 19.1 Guarded Signals and Disconnection
    2. 19.2 Blocks and Guarded Signal Assignment
    3. 19.3 Using Blocks for Structural Modularity
  27. Chapter 20: Access Types and Abstract Data Types
    1. 20.1 Access Types
    2. 20.2 Linked Data Structures
    3. 20.3 Abstract Data Types Using Packages
  28. Chapter 21: Files and Input/Output
    1. 21.1 Files
    2. 21.2 The Package Textio
  29. Chapter 22: Attributes and Groups
    1. 22.1 Predefined Attributes
    2. 22.2 User-Defined Attributes
    3. 22.3 Groups
  30. Chapter 23: Case Study 4: Communication System
    1. 23.1 Communication System Overview
    2. 23.2 Frequency Shift Keying
    3. 23.3 FSK Detection
    4. 23.4 Trade-Off Study
  31. Chapter 24: Miscellaneous Topics
    1. 24.1 Buffer and Linkage Ports
    2. 24.2 Conversion Functions in Association Lists
    3. 24.3 Postponed Processes
    4. 24.4 Shared Variables
  32. Chapter 25: Integrated System Modeling
    1. 25.1 Top-down Design
    2. 25.2 System Specification
    3. 25.3 Partitioning the System
    4. 25.4 Refining the Design
    5. 25.5 Model Calibration
    6. 25.6 System Verification
    7. 25.7 Synthesis and Reuse
    8. 25.8 Design Trade-Offs and Optimization
  33. Chapter 26: Case Study 5: RC Airplane System
    1. 26.1 RC System Overview
    2. 26.2 Interfacing Command and Control to the Rudder System
    3. 26.3 System Power Supply Effects
    4. 26.4 Propeller System
    5. 26.5 Human Controller
    6. 26.6 Summary
  34. Appendix A: Using SPICE Models in VHDL-AMS
  35. Appendix B: The Predefined Package Standard
  36. Appendix C: IEEE Standard Packages
  37. Appendix D: Related Standards
  38. Appendix E: VHDL-AMS Syntax
  39. Appendix F: Answers to Exercises
  40. Appendix G: CD-ROM Guide
  41. References
  42. Index

Product information

  • Title: The System Designer's Guide to VHDL-AMS
  • Author(s): Peter J. Ashenden, Gregory D. Peterson, Darrell A. Teegarden
  • Release date: September 2002
  • Publisher(s): Morgan Kaufmann
  • ISBN: 9780080518367