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The Designer’s Guide to VHDL, Third Edition by Peter Ashenden

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Chapter 17. Case Study: A Package for Memories

In this case study, we will develop a package of operations on memories, including operations to read and write memories, to implement the behavior of different kinds of memories, to load a simulated memory from a file, and to dump the contents of a simulated memory to a file. Our package is written to be reusable for memories of various sizes and various address and data types. For this case study, we will focus on implementations from which synthesis tools could, in principle, infer block memory resources. Such implementations use array signals for the memory storage. The memory sizes that are fesible range from relatively small (Kbits) to moderately large (100s of Kbits). Test benches, on the other ...

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