Interrupt Behavior
Publisher Summary
This chapter discusses the process of Interrupt/Exception Sequences, which include stacking, vector fetch by the instruction bus, and update of the stack pointer, link register, and program counter. It discusses nested interrupt support, which is built into the Cortex-M3 processor core and the Nested Vectored Interrupt Controller. Interrupt latency, which refers to the delay from the start of the interrupt request to the start of interrupt handler execution, is explained. The Cortex-M3 uses a number of methods to improve interrupt latency, including tail chaining and late arrival exception handling. The chapter explores the special value called EXC_RETURN, which, when loaded into the PC at the end ...
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