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The Definitive Guide to the ARM Cortex-M3, 2nd Edition by Joseph Yiu

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CHAPTER 8

The Nested Vectored Interrupt Controller and Interrupt Control

Publisher Summary

The Nested Vectored Interrupt Controller (NVIC) is an integrated part of the Cortex-M3 processor. It is closely linked to the Cortex-M3 CPU core logic. Its control registers can be accessed as memory-mapped devices. This chapter describes the basic Interrupt configuration. The NVIC supports 1–240 external interrupt inputs which are commonly known as interrupt request queues (IRQs). Procedures of setting up an interrupt have been demonstrated with examples. This chapter also throws light on the basic interrupt configurations with the help of different registers and highlights software interrupt and how it can be generated. The chapter ends with a detailed ...

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