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The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors, 2nd Edition by Joseph Yiu

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Chapter 11

Fault Handling

Abstract

This chapter provides an overview of the fault exception mechanism of the Cortex-M processor, various situations of how fault exceptions are triggered, how to analyze the faults, handle the faults and differences of fault handling features in ARMv6-M compared to ARMv7-M architecture. This chapter also explains the LOCKUP situation—where a fault cannot be handled.

Keywords

Error handling; Fault analysis; Fault exception overview; Lockup state; Reasons for HardFault; Recommendations

11.1. Fault Exception Overview

In ARM® processors, if a program goes wrong and the processor detects a fault, then a fault exception occurs. On the Cortex®-M0/M0+ processors, there is only one exception type that handles faults: the HardFault ...

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