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The 8085 Microprocessor: Architecture, Programming and Interfacing

Book Description

Designed for an undergraduate course on the 8085 microprocessor, this text provides comprehensive coverage of the programming and interfacing of the 8-bit microprocessor. Written in a simple and easy-to-understand manner, this book introduces the reader to the basics and the architecture of the 8085 microprocessor. It presents balanced coverage of both hardware and software concepts related to the microprocessor.

Table of Contents

  1. Cover
  2. Title Page
  3. Copyright
  4. Dedication
  5. Contents
  6. Preface
    1. ACKNOWLEDGEMENTS
  7. I: FUNDAMENTALS OF A MICROPROCESSOR
    1. INTRODUCTION
    2. 1: Evolution of Microprocessors
      1. 1.1 EARLY INTEGRATED CIRCUITS
      2. 1.2 4-BIT MICROPROCESSORS
      3. 1.3 8-BIT MICROPROCESSORS
      4. 1.4 16-BIT MICROPROCESSORS
      5. 1.5 32-BIT MICROPROCESSORS
      6. 1.6 RECENT MICROPROCESSORS
      7. 1.7 MICROCONTROLLERS AND DIGITAL SIGNAL PROCESSORS
    3. 2: Fundamentals of a Computer
      1. 2.1 CALCULATOR
      2. 2.2 COMPUTER
      3. 2.3 MICROCOMPUTER
      4. 2.4 COMPUTER LANGUAGES
      5. QUESTIONS
    4. 3: Number Representation
      1. 3.1 UNSIGNED BINARY INTEGERS
      2. 3.2 SIGNED BINARY INTEGERS
      3. 3.3 REPRESENTATION OF FRACTIONS
      4. 3.4 SIGNED FLOATING POINT NUMBERS
      5. QUESTIONS
    5. 4: Fundamentals of Microprocessor
      1. 4.1 HISTORY OF MICROPROCESSORS
      2. 4.2 DESCRIPTION OF 8085 PINS
      3. 4.3 PROGRAMMER'S VIEW OF 8085: NEED FOR REGISTERS
      4. 4.3.1 MEANING OF PROGRAMMER'S VIEW
      5. 4.4 ACCUMULATOR OR REGISTER A
      6. 4.5 REGISTERS B, C, D, E, H, AND L
      7. QUESTIONS
    6. 5: First Assembly Language Program
      1. 5.1 PROBLEM STATEMENT
      2. 5.2 ABOUT THE MICROPROCESSOR KIT
      3. 5.3 USING THE MICROPROCESSOR KIT IN SERIAL MODE
      4. QUESTIONS
    7. 6: Data Transfer Group of Instructions
      1. 6.1 CLASSIFICATION OF 8085 INSTRUCTIONS
      2. 6.2 INSTRUCTION TYPE MVI r, d8
      3. 6.3 INSTRUCTION TYPE MOV r1, r2
      4. 6.4 INSTRUCTION TYPE MOV r, M
      5. 6.5 INSTRUCTION TYPE MOV M, r
      6. 6.6 INSTRUCTION TYPE LXI rp, d16
      7. 6.7 INSTRUCTION TYPE MVI M, d8
      8. 6.8 INSTRUCTION TYPE LDA a16
      9. 6.9 INSTRUCTION TYPE STA a16
      10. 6.10 INSTRUCTION TYPE XCHG
      11. 6.11 ADDRESSING MODES OF 8085
      12. 6.12 INSTRUCTION TYPE LDAX rp
      13. 6.13 INSTRUCTION TYPE STAX rp
      14. 6.14 INSTRUCTION TYPE LHLD a16
      15. 6.15 INSTRUCTION TYPE SHLD a16
      16. QUESTIONS
    8. 7: Arithmetic Group of Instructions
      1. 7.1 INSTRUCTIONS TO PERFORM ADDITION
      2. 7.2 INSTRUCTIONS TO PERFORM SUBTRACTION
      3. 7.3 INSTRUCTION TYPE INX rp
      4. 7.4 INSTRUCTION TYPE DCX rp
      5. 7.5 INSTRUCTION TYPE DAD rp
      6. 7.6 DECIMAL ADDITION IN 8085
      7. QUESTIONS
    9. 8: Logical Group of Instructions
      1. 8.1 INSTRUCTIONS TO PERFORM ‘AND’ OPERATION
      2. 8.2 INSTRUCTIONS TO PERFORM ‘OR’ OPERATION
      3. 8.3 INSTRUCTIONS TO PERFORM ‘EXCLUSIVE OR’ OPERATION
      4. 8.4 INSTRUCTION TO COMPLEMENT ACCUMULATOR
      5. 8.5 INSTRUCTIONS TO COMPLEMENT/SET ‘Cy’ FLAG
      6. 8.6 INSTRUCTIONS TO PERFORM COMPARE OPERATION
      7. 8.7 INSTRUCTIONS TO ROTATE ACCUMULATOR
      8. QUESTIONS
    10. 9: NOP and Stack Group of Instructions
      1. 9.1 STACK AND THE STACK POINTER
      2. 9.2 INSTRUCTION TYPE POP rp
      3. 9.3 INSTRUCTION TYPE PUSH rp
      4. 9.4 INSTRUCTION TYPE LXI SP, d16
      5. 9.5 INSTRUCTION TYPE SPHL
      6. 9.6 INSTRUCTION TYPE XTHL
      7. 9.7 INSTRUCTION TYPE INX SP
      8. 9.8 INSTRUCTION TYPE DCX SP
      9. 9.9 INSTRUCTION TYPE DAD SP
      10. 9.10 INSTRUCTION TYPE NOP
      11. QUESTIONS
    11. 10: Branch Group of Instructions
      1. 10.1 MORE DETAILS ABOUT PROGRAM EXECUTION
      2. 10.2 UNCONDITIONAL JUMP INSTRUCTIONS
      3. 10.3 CONDITIONAL JUMP INSTRUCTIONS
      4. 10.4 UNCONDITIONAL CALL AND RETURN INSTRUCTIONS
      5. 10.5 CONDITIONAL CALL INSTRUCTIONS
      6. 10.6 CONDITIONAL RETURN INSTRUCTIONS
      7. 10.7 RST n —RESTART INSTRUCTIONS
      8. QUESTIONS
    12. 11: Chip Select Logic
      1. 11.1 CONCEPT OF CHIP SELECTION
      2. 11.2 RAM CHIP PIN DETAILS AND ADDRESS RANGE
      3. 11.3 MULTIPLE MEMORY ADDRESS RANGE
      4. 11.4 WORKING OF 74138 DECODER IC
      5. 11. USE OF 74138 TO GENERATE CHIP SELECT LOGIC
      6. 11.6 USE OF 74138 IN ALS-SDA-85M KIT
      7. QUESTIONS
    13. 12: Addressing of I/O Ports
      1. 12.1 NEED FOR I/O PORTS
      2. 12.2 IN AND OUT INSTRUCTIONS
      3. 12.3 MEMORY-MAPPED I/O
      4. 12.4 I/O-MAPPED I/O
      5. 12.5 COMPARISON OF MEMORY-MAPPED I/O AND I/O-MAPPED I/O
      6. QUESTIONS
    14. 13: Architecture of 8085
      1. 13.1 DETAILS OF 8085 ARCHITECTURE
      2. 13.2 INSTRUCTION CYCLE
      3. 13.3 COMPARISON OF DIFFERENT MACHINE CYCLES
      4. 13.4 MEMORY SPEED REQUIREMENT
      5. 13.5 WAIT STATE GENERATION
      6. QUESTIONS
  8. II: Assembly Language Programs
    1. INTRODUCTION
    2. 14: Simple Assembly Language Programs
      1. 14.1 EXCHANGE 10 BYTES
      2. 14.2 ADD TWO MULTI-BYTE NUMBERS
      3. 14.3 ADD TWO MULTI-BYTE BCD NUMBERS
      4. 14.4 BLOCK MOVEMENT WITHOUT OVERLAP
      5. 14.5 BLOCK MOVEMENT WITH OVERLAP
      6. 14.6 ADD N NUMBERS OF SIZE 8 BITS
      7. 14.7 CHECK THE FOURTH BIT OF A BYTE
      8. 14.8 SUBTRACT TWO MULTI-BYTE NUMBERS
      9. 14.9 MULTIPLY TWO NUMBERS OF SIZE 8 BITS
      10. 14.10 DIVIDE A 16-BIT NUMBER BY AN 8-BIT NUMBER
      11. QUESTIONS
    3. 15: Use of PC in Writing and Executing 8085 Programs
      1. 15.1 STEPS NEEDED TO RUN AN ASSEMBLY LANGUAGE PROGRAM
      2. 15.2 CREATION OF .ASM FILE USING A TEXT EDITOR
      3. 15.3 GENERATION OF .OBJ FILE USING A CROSS-ASSEMBLER
      4. 15.4 GENERATION OF .HEX FILE USING A LINKER
      5. 15.5 DOWNLOADING THE MACHINE CODE TO THE KIT
      6. 15.6 RUNNING THE DOWNLOADED PROGRAM ON THE KIT
      7. 15.7 RUNNING THE PROGRAM USING THE PC AS A TERMINAL
      8. QUESTIONS
    4. 16: Aditional Assembly Language Programs
      1. 16.1 SEARCH FOR A NUMBER USING LINEAR SEARCH
      2. 16.2 FIND THE SMALLEST NUMBER
      3. 16.3 COMPUTE THE HCF OF TWO 8-BIT NUMBERS
      4. 16.4 CHECK FOR ‘2 OUT OF 5’ CODE
      5. 16.5 CONVERT ASCII TO BINARY
      6. 16.6 CONVERT BINARY TO ASCII
      7. 16.7 CONVERT BCD TO BINARY
      8. 16.8 CONVERT BINARY TO BCD
      9. 16.9 CHECK FOR PALINDROME
      10. 16.10 COMPUTE THE LCM OF TWO 8-BIT NUMBERS
      11. 16.11 SORT NUMBERS USING BUBBLE SORT
      12. 16.12 SORT NUMBERS USING SELECTION SORT
      13. 16.13 SIMULATE DECIMAL UP COUNTER
      14. 16.14 SIMULATE DECIMAL DOWN COUNTER
      15. 16.15 DISPLAY ALTERNATELY 00 AND FF IN THE DATA FIELD
      16. 16.16 SIMULATE A REAL-TIME CLOCK
      17. QUESTIONS
    5. 17: More Complex Assembly Language Programs
      1. 17.1 SUBTRACT MULTI-BYTE BCD NUMBERS
      2. 17.2 CONVERT 16-BIT BINARY TO BCD
      3. 17.3 DO AN OPERATION ON TWO NUMBERS BASED ON THE VALUE OF X
      4. 17.4 DO AN OPERATION ON TWO BCD NUMBERS BASED ON THE VALUE OF X
      5. 17.5 BUBBLE SORT IN ASCENDING/DESCENDING ORDER AS PER CHOICE
      6. 17.6 SELECTION SORT IN ASCENDING/DESCENDING ORDER AS PER CHOICE
      7. 17.7 ADD CONTENTS OF N WORD LOCATIONS
      8. 17.8 MULTIPLY TWO 8-BIT NUMBERS (SHIFT AND ADD METHOD)
      9. 17.9 MULTIPLY TWO 2-DIGIT BCD NUMBERS
      10. 17.10 MULTIPLY TWO 16-BIT BINARY NUMBERS
      11. QUESTIONS
  9. III: Programmable and Non-Programmable I/O Ports
    1. INTRODUCTION
    2. 18: Interrupts in 8085
      1. 18.1 DATA TRANSFER SCHEMES
      2. 18.2 GENERAL DISCUSSION ABOUT 8085 INTERRUPTS
      3. 18.3 EI AND DI INSTRUCTIONS
      4. 18.4 INTR AND INTA* PINS
      5. 18.5 RST5.5 AND RST6.5 PINS
      6. 18.6 RST7.5 PIN
      7. 18.7 TRAP INTERRUPT PIN
      8. 18.8 EXECUTION OF ‘DAD rp’ INSTRUCTION
      9. 18.9 SIM AND RIM INSTRUCTIONS
      10. 18.10 HLT INSTRUCTION
      11. 18.11 PROGRAMS USING INTERRUPTS
      12. QUESTIONS
    3. 19: 8212 Non-Programmable 8-Bit I/O Port
      1. 19.1 WORKING OF 8212
      2. 19.2 APPLICATIONS OF 8212
      3. QUESTIONS
    4. 20: 8255 Programmable Peripheral Interface Chip
      1. 20.1 DESCRIPTION OF 8255 PPI
      2. 20.2 OPERATIONAL MODES OF 8255
      3. 20.3 CONTROL PORT OF 8255
      4. 20.4 MODE 1—STROBED I/O
      5. 20.5 MODE 2—BI-DIRECTIONAL I/O
      6. QUESTIONS
    5. 21: Programs using Interface Modules
      1. 21.1 DESCRIPTION OF LOGIC CONTROLLER INTERFACE
      2. 21.2 SUCCESSIVE APPROXIMATION ADC INTERFACE
      3. 21.3 DUAL SLOPE ADC INTERFACE
      4. 21.4 DIGITAL TO ANALOG CONVERTER INTERFACE
      5. 21.5 STEPPER MOTOR INTERFACE
      6. QUESTIONS
  10. IV: Support Chips
    1. INTRODUCTION
    2. 22: Interfacing of I/o Devices
      1. 22.1 INTERFACING 7-SEGMENT DISPLAY
      2. 22.2 DISPLAY INTERFACE USING SERIAL TRANSFER
      3. 22..3 INTERFACING A SIMPLE KEYBOARD
      4. 22.4 INTERFACING A MATRIX KEYBOARD
      5. 22..5 DESCRIPTION OF MATRIX KEYBOARD INTERFACE
      6. 22.6 INTEL 8279 KEYBOARD AND DISPLAY CONTROLLER
      7. 22.7 PROGRAMS USING 8279
      8. QUESTIONS
    3. 23: Intel 8259A— Programmable Interrupt Controller
      1. 23.1 NEED FOR AN INTERRUPT CONTROLLER
      2. 23.2 OVERVIEW OF THE WORKING OF 8259
      3. 23.3 PINS OF 8259
      4. 23.4 REGISTERS USED IN 8259
      5. 23.5 PROGRAMMING THE 8259 WITH NO SLAVES
      6. 23.6 PROGRAMMING THE 8259 WITH SLAVES
      7. 23.7 USE OF 8259 IN AN 8086-BASED SYSTEM
      8. 23.8 ARCHITECTURE OF 8259
      9. QUESTIONS
    4. 24: Intel 8257—Programmable DMA Controller
      1. 24.1 CONCEPT OF DIRECT MEMORY ACCESS (DMA)
      2. 24.2 NEED FOR DMA DATA TRANSFER
      3. 24.3 DESCRIPTION OF 8257 DMA CONTROLLER CHIP
      4. 24.4 PROGRAMMING THE 8257
      5. 24.5 DESCRIPTION OF THE PINS OF 8257
      6. 24.6 WORKING OF THE 8257 DMA CONTROLLER
      7. 24.7 STATE DIAGRAM OF 8085
      8. QUESTIONS
    5. 25: Intel 8253—Programmable Interval Timer
      1. 25.1 NEED FOR PROGRAMMABLE INTERVAL TIMER
      2. 25.2 DESCRIPTION OF 8253 TIMER
      3. 25.3 PROGRAMMING THE 8253
      4. 25.4 MODE 0—INTERRUPT ON TERMINAL COUNT
      5. 25.5 MODE 1—RE-TRIGGERABLE MONO-STABLE MULTI
      6. 25.6 MODE 2—RATE GENERATOR
      7. 25.7 MODE 3—SQUARE WAVE GENERATOR
      8. 25.8 MODE 4—SOFTWARE-TRIGGERED STROBE
      9. 25.9 MODE 5—HARDWARE-TRIGGERED STROBE
      10. 25.10 USE OF 8253 IN ALS-SDA-85 KIT
      11. QUESTIONS
    6. 26: Intel 8251A—Universal Synchronous Asynchronous Receiver Transmitter (USART)
      1. 26.1 NEED FOR USART
      2. 26.2 ASYNCHRONOUS TRANSMISSION
      3. 26.3 ASYNCHRONOUS RECEPTION
      4. 26.4 SYNCHRONOUS TRANSMISSION
      5. 26.5 SYNCHRONOUS RECEPTION
      6. 26.6 PIN DESCRIPTION OF 8251 USART
      7. 26.7 PROGRAMMING THE 8251
      8. 26.8 USE OF SOD PIN OF 8085 FOR SERIAL TRANSFER
      9. QUESTIONS
    7. 27: Zilog Z-80 Microprocessor
      1. 27.1 COMPARISON OF INTEL 8080 WITH INTEL 8085
      2. 27.2 PROGRAMMER'S VIEW OF Z-80
      3. 27.3 SPECIAL FEATURES OF Z-80
      4. 27.4 ADDRESSING MODES OF Z-80
      5. 27.5 SPECIAL INSTRUCTION TYPES
      6. 27.6 PINS OF Z-80
      7. 27.7 INTERRUPT STRUCTURE IN Z-80
      8. 27.8 PROGRAMMING EXAMPLES
      9. 27.9 INSTRUCTION SET SUMMARY
      10. QUESTIONS
    8. 28: Motorola M6800 Microprocessor
      1. 28.1 PIN DESCRIPTION OF 6800
      2. 28.2 PROGRAMMER's VIEW OF 6800
      3. 28.3 ADDRESSING MODES OF 6800
      4. 28.4 INSTRUCTION SET OF 6800
      5. 28.5 INTERRUPTS OF 6800
      6. PROGRAMMING EXAMPLES
      7. QUESTIONS
    9. 29: 8051 Microcontroller
      1. 29.1 MAIN FEATURES OF INTEL 8051
      2. 29.2 FUNCTIONAL BLOCKS OF INTEL 8051
      3. 29.3 PROGRAM MEMORY STRUCTURE
      4. 29.4 DATA MEMORY STRUCTURE
      5. 29.5 PROGRAMMER'S VIEW OF 8051
      6. 29.6 ADDRESSING MODES OF 8051
      7. 29.7 INSTRUCTION SET OF 8051
      8. 29.8 PROGRAMMING EXAMPLES
      9. QUESTIONS
    10. 30: Advanced Topics In 8051
      1. 30.1 INTERRUPT STRUCTURE OF 8051
      2. 30.2 TIMERS OF 8051
      3. 30.3 SERIAL INTERFACE
      4. 30.4 STRUCTURE AND OPERATION OF PORTS
      5. 30.5 POWER SAVING MODES OF 8051
      6. 30.6 PROGRAMMING OF EPROM IN 8751BH
      7. QUESTIONS
  11. Bibliography
  12. Index