RapidIO: The Next Generation Communication Fabric For Embedded Application

1.3. SYSTEM OF SYSTEMS

Traditional system design has busied itself with the task of connecting processors together with peripheral devices. In this approach there is typically a single processor and a group of peripherals attached to it. The peripherals act as slave devices with the main processor being the central point of control. This master/slave architecture has been used for many years and has served the industry well.

Figure 1.3. Motorola PowerQUICC III block diagram

With the increasing use of system on a chip (SoC) integration, the task of connecting processors to peripherals has become the task of the SoC developer. Peripheral functionality is increasingly being offered as part of an integrated device rather than as a standalone component.

Most microprocessors or DSPs designed for the embedded market now contain a significant amount of integration. L2 cache, Memory controllers, Ethernet, PCI, all formally discrete functions, have found their way onto the integrated processor die. This integration then moves the system developer's task up a level to one of integrating several SoC devices together in the system. Here a peer-to-peer connection model is often more appropriate than a master/slave model.

Figure 1.3 shows a block diagram of the Motorola PowerQUICC III communications processor. This processor offers a wealth of integrated peripheral functionality, including ...