RapidIO: The Next Generation Communication Fabric For Embedded Application

11.3. MEMORY COHERENCY SUPPORT

This section provides an overview of the RapidIO Interconnect Globally Shared Memory Logical Specification, including a description of the relationship between the GSM specifications and the other specifications of the RapidIO interconnect.

The globally shared memory programming model is the preferred programming model for modern general-purpose multiprocessing computer systems, which requires cache coherency support in hardware. This addition of GSM enables both distributed I/O processing and general-purpose multiprocessing to co-exist under the same protocol.

11.3.1. Features of the Globally Shared Memory (GSM) Specification

The RapidIO GSM specification offers the following capabilities, which are designed to satisfy the needs of various applications and systems:

• A cache coherent non-uniform memory access (CC-NUMA) system architecture is supported to provide a globally shared memory model in an environment with point-to-point connectivity between devices as opposed to a traditional bus-based interconnect.

• The size of the supported processor memory requests are either in the cache coherence granularity, or smaller. The coherence granule size may be different for different processor families or implementations.

• The GSM protocols support a variety of cache control and other operations such as block flushes. These functions are provided so that systems can be built offering compatibility with legacy applications and operating systems.

In addition to ...