RapidIO: The Next Generation Communication Fabric For Embedded Application

Chapter 9. Interoperating with PCI Technologies

RapidIO contains a rich set of operations and capabilities. RapidIO can easily support the transport of legacy interconnects such as PCI in a transparent manner. While RapidIO and PCI share similar functionality, the two interconnects have different protocols and require a translation function to move transactions between them. A RapidIO to PCI bridge processing element is required to make the necessary translation between the protocols of the two interconnects. This chapter describes the architectural considerations needed for a RapidIO to PCI bridge. This chapter is not intended as an implementation instruction manual, rather, it is meant to provide direction to the bridge architect and aid in the development of interoperable devices. For this chapter it is assumed that the reader has a thorough understanding of the PCI 2.2 and/or the PCI-X 1.0 specifications.

Figure 9.1 shows a system with devices containing both RapidIO- and PCI-based devices connected by various RapidIO and PCI bus segments. A host bridge is connected to various peripherals via a PCI bus. A RapidIO bridge device is used to translate PCI formatted transactions to the equivalent RapidIO operations to allow access to the rest of the system, including additional subordinate or downstream PCI bus segments.

For transactions that must travel between RapidIO and PCI the following operations are necessary:

• Map address spaces defined on the PCI bus to those of RapidIO ...