Pulse and Digital Circuits

5.3 THE EFFECT OF DIODE CHARACTERISTICS ON THE CLAMPING VOLTAGE

For the clamping circuit shown in Fig. 5.7, to obtain the steady-state response, the diode is replaced by R_f when ON and R_r = ∞ when OFF. Though the positive peak of the signal in the output is ideally required to be clamped to the zero level, in practice it is clamped to a voltage V_cl = V_γ, where V_γ is the cut-in voltage of the diode. In a practical diode, the current variation is non-linear in nature. Hence, we consider the influence of the diode characteristics on the clamping voltage, V_cl and show that the clamping voltage (V_cl) changes with a change in the amplitude of the input signal. Let us consider the clamping circuit described in Fig. 5.7 and let its input be a symmetric ...