Testing the Inrush Performance of PSEs
However, we do need to test the PSE for its overall inrush current capability and protection. The question is how do we do that if in a properly behaving setup, the PD’s pass-FET is always in series with the PSE’s pass-FET, and is the one dominating the current limiting? What we want to do is to be able to test the PSE’s current limit, by somehow turning OFF current limiting in the PD. But as indicated in the top-left of Fig. 5.4, as soon as we do that, we usually get the familiar Power-up cycling and oscillations.
As identified in Fig. 5.4 too, one way out is to run the PD’s pass-FET in its linear region (insignificant hysteresis scenario). Note that in this state, the PD’s pass-FET is not performing ...

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