Example PCI-Compatible Configuration Access

Refer to Figure 20-9 on page 737. The following x86 code sample will cause the Root Complex to perform a read from Bus 4, Device 0, Function 0's Vendor ID configuration register:

mov   dx,0CF8     ;set dx = config address port address
mov   eax,80040000;enable=1, bus 4, dev 0, Func 0, DW 0
out   dx,eax      ;set up address port
mov   dx,0CFC     ; set dx = config data port address
in    ax,dx       ;2 byte read from config data port

  1. On execution of the out (IO Write) instruction, the processor generates an IO write transaction on its FSB targeting the Configuration Address Port in the Root Complex Host/PCI bridge. The data sourced from the eax register is latched into the Configuration Address Port (see Figure 20-2 on page 726). ...

Get PCI Express System Architecture now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.

Start your free trial