PCI Express Enhanced Configuration Mechanism
Description
Refer to Table 20-1 on page 732. Each function's 4KB configuration space starts at a 4KB-aligned address within the 256MB memory space set aside as configuration space:
Address bits 63:28 indicates the 256MB-aligned base address of the overall Enhanced Configuration address range.
Address bits 27:20 select the target bus (1-of-256).
Address bits 19:15 select the target device (1-of-32) on the bus.
Address bits 14:12 select the target function (1-of-8) within the device.
Address bits 11:2 selects the target dword (1-of-1024) within the selected function's configuration space.
Address bits 1:0 define the start byte location within the selected dword.
Some Rules
A Root Complex design is not required ...
Get PCI Express System Architecture now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
