PCI Express System Architecture

Background

PCI Express continues the PCI 2.3 tradition of supporting locked transaction sequences (RMW—ready-modify-write) to support legacy device software. PCI Express devices and their software drivers are never allowed to use instructions that cause the CPU to generate locked operations that target memory that resides beneath the Roor Complex level.

Locked operations consist of the basic RMW sequence, that is:

1.	One or more memory reads from the target location to obtain the semaphore value.
2.	The modification of the data within a processor register.
3.	One or more writes to write the modified semaphore value back to the target memory location.

This transaction sequence must be performed such that no other accesses are permitted to the target ...