CONTENTS
44.2.1 Six-Transistor SRAM Cell
44.2.2 Eight-Transistor SRAM Cell
44.3 Performance of CNTFET SRAM Cells
44.4 Performance of CNTFET SRAM Cells under Parameter Variations
44.5 CNTFET SRAM Cell with Metallic CNTs
44.6 Optimization of the Performance of the Cell and Functional Probability
44.7 Memory with Spare Columns
44.1 INTRODUCTION
For the past four decades, CMOS scaling has offered improved performance from one technology node to the next. However, as device scaling moves beyond the 32 nm node, significant technological ...
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