Part I: Hardware
T he levels of integration provided by modern VLSI technology have fundamentally altered the hardware design process. When designing a 50-million or 100-million chip, design teams can no longer afford to design a gate-at-a-time or a wire-at-a-time. Chip architects and designers must learn to think in much larger blocks of intellectual property (IP). Some of those blocks will be synthesized from higher-level hardware description language (HDL) sources. Some blocks will be manually designed in order to provide maximum performance and minimum power consumption for critical modules. In either case, most of these IP blocks will be designed for reuse on multiple chips.
The design of multiprocessors also requires designers to change ...
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