Acknowledgments
Credit is due to the whole Tensilica engineering team, whose work is represented by the Xtensa architecture and processors, the processor generator, and key tools such as the Xtensa Modeling Protocol. Moreover, 5 years of tight interaction between Tensilica and countless customers have honed the capabilities of the processor and associated tools to fit the demands of multiple-processor systems-on-chips. Special thanks go to Steve Leibson for his work in organizing and editing this chapter.
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