Multicore DSP

15FIR filter implementation

CHAPTER MENU

1. 15.1 Introduction
2. 15.2 Properties of an FIR filter
   1. 15.2.1 Filter coefficients
   2. 15.2.2 Frequency response of an FIR filter
   3. 15.2.3 Phase linearity of an FIR filter
3. 15.3 Design procedure
   1. 15.3.1 Specifications
   2. 15.3.2 Coefficients calculation
      1. 15.3.2.1 Window method
   3. 15.3.3 Realisation structure
      1. 15.3.3.1 Direct structure
      2. 15.3.3.2 Linear phase structures
      3. 15.3.3.3 Cascade structures
4. 15.4 Laboratory experiments
   1. 15.4.1 Filter implementation
   2. 15.4.2 Synchronisation
   3. 15.4.3 Building and running the DSP project
   4. 15.4.4 Building and running the PC project
5. 15.5 Conclusion
6. References

15.1 Introduction

Amongst all the obvious advantages that digital filters offer, the finite impulse response (FIR) filter can also guarantee linear phase characteristics that neither analogue nor infinite impulse response (IIR) filters can achieve. There are many commercially available software packages for filter design. However, without basic theoretical knowledge of the FIR filter, it will be difficult to use them.

The main purpose of this chapter is twofold. First is to show how to design an FIR filter and implement it on the TMS320C66x processor, and second to show how to interface a PC with the TMS320C6678 EVM using the UART interface.

15.2 Properties of an FIR filter

15.2.1 Filter coefficients

An FIR filter can be defined by the following expression:

(15.1)

where:

• x[n] represents the filter input.
• b_k represents the filter coefficients.
• y[n] represents ...