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Multi-Mode / Multi-Band RF Transceivers for Wireless Communications: Advanced Techniques, Architectures, and Trends

Book Description

  • Summarizes cutting-edge physical layer technologies for multi-mode wireless RF transceivers.

  • Includes original contributions from distinguished researchers and professionals.

  • Covers cutting-edge physical layer technologies for multi-mode wireless RF transceivers.

  • Contributors are all leading researchers and professionals in this field.

Table of Contents

  1. Cover
  2. Half Title page
  3. Title page
  4. Copyright page
  5. Preface
  6. Contributors
  7. Part I: Transceiver Concepts and Design
    1. Chapter 1: Software-Defined Radio Front Ends
      1. 1.1 Introduction
      2. 1.2 System-Level Considerations
      3. 1.3 Wideband LO Synthesis
      4. 1.4 Receiver Building Blocks
      5. 1.5 Transmitter Building Blocks
      6. 1.6 Calibration Techniques
      7. 1.7 Full SDR Implementation
      8. 1.8 Conclusions
      9. References
    2. Chapter 2: Software-Defined Transceivers
      1. 2.1 Introduction
      2. 2.2 Radio Architectures
      3. 2.3 SDR Building Blocks
      4. 2.4 Example of an SDR Transceiver
      5. References
    3. Chapter 3: Adaptive Multi-Mode RF Front-End Circuits
      1. 3.1 Introduction
      2. 3.2 Adaptive Multi-Mode Low-Power Wireless RF IC Design
      3. 3.3 Multi-Mode Receiver Concept
      4. 3.4 Design of A Multi-Mode Adaptive RF Front End
      5. 3.5 Experimental Results for the Image-Reject Down-Converter
      6. 3.6 Conclusions
      7. References
    4. Chapter 4: Precise Delay Alignment Between Amplitude and Phase/Frequency Modulation Paths in a Digital Polar Transmitter
      1. 4.1 Introduction
      2. 4.2 RF Polar Transmitter in Nanoscale CMOS
      3. 4.3 Amplitude and Phase Modulation
      4. 4.4 Mechanisms to Achieve Subnanosecond Amplitude and Phase Modulation Path Alignments
      5. 4.5 Precise Alignment of Multi-Rate Direct and Reference Point Data Modulation Injection in Adpll
      6. References
    5. Chapter 5: Overview of Front-End RF Passive Integration into SoCs
      1. 5.1 Introduction
      2. 5.2 The Concept of a Receiver Translational Loop
      3. 5.3 Feedforward Loop Nonideal Effects
      4. 5.4 Feedforward Receiver Circuit Implementations
      5. 5.5 Feedforward Receiver Experimental Results
      6. 5.6 Feedback Notch Filtering for a WCDMA Transmitter
      7. 5.7 Feedback-Based Transmitter Stability Analysis
      8. 5.8 Impacts of Nonidealities in Feedback-Based Transmission
      9. 5.9 Transmitter Building Blocks
      10. 5.10 Feedback-Based Transmitter Measurement Results
      11. Appendix
      12. References
    6. Chapter 6: ADCs and DACs for Software-Defined Radio
      1. 6.1 Introduction
      2. 6.2 ADC and DAC Requirements in Wireless Systems
      3. 6.3 Multi-Standard Transceiver Architectures
      4. 6.4 Evaluating Reconfigurability
      5. 6.5 ADCs for Software-Defined Radio
      6. 6.6 DACs for Software-Defined Radio
      7. 6.7 Conclusions
      8. References
  8. Part II: Receiver Design
    1. Chapter 7: OFDM Transform-Domain Receivers for Multi-Standard Communications
      1. 7.1 Introduction
      2. 7.2 Transform-Domain Receiver Background
      3. 7.3 Transform-Domain Sampling Receiver
      4. 7.4 Digital Baseband Design for The TD Receiver
      5. 7.5 A Comparative Study
      6. 7.6 Simulations
      7. 7.7 Bandwidth Product Requirement For an OP-AMP in a Charge-Sampling Circuit
      8. 7.8 Sparsity of (GHG)−1
      9. 7.9 Applications
      10. 7.10 Conclusions
      11. References
    2. Chapter 8: Discrete-Time Processing of RF Signals
      1. 8.1 Introduction
      2. 8.2 Scaling of an MOS Switch
      3. 8.3 Sampling Mixer
      4. 8.4 Filter Synthesis
      5. 8.5 Noise in Switched-Capacitor Filters
      6. 8.6 Circuit-Design Considerations
      7. 8.7 Perspective and Outlook
      8. References
    3. Chapter 9: Oversampled ADC Using VCO-Based Quantizers
      1. 9.1 Introduction
      2. 9.2 VCO-Quantizer Background
      3. 9.3 SNDR Limitations for VCO-Based Quantization
      4. 9.4 VCO Quantizer ∑Δ ADC Architecture
      5. 9.5 Prototype ∑Δ ADC Example with a VCO Quantizer
      6. 9.6 Conclusions
      7. References
    4. Chapter 10: Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals
      1. 10.1 Introduction
      2. 10.2 Mobile Terminal Challenges
      3. 10.3 Research Directions Toward a Multi-Band Receiver
      4. 10.4 Multi-Mode Receiver Principles and RF System Analysis for A W-CDMA Receiver
      5. 10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage Saw Filter
      6. 10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS
      7. 10.7 RX Front-END Performance Comparison
      8. References
    5. Chapter 11: Digitally Enhanced Alternate Path Linearization of RF Receivers
      1. 11.1 Introduction
      2. 11.2 Adaptive Feedforward Error Cancellation
      3. 11.3 Architectural Concepts
      4. 11.4 Alternate Feedforward Path Block Design Considerations
      5. 11.5 Experimental Design of an Adaptively Linearized UMTS Receiver
      6. 11.6 Experimental Results of an Adaptively Linearized UMTS Receiver
      7. 11.7 Conclusions
      8. References
  9. Part III: Transmitter Techniques
    1. Chapter 12: Linearity and Efficiency Strategies for Next-Generation Wireless Communications
      1. 12.1 Introduction
      2. 12.2 Power Amplifier Function
      3. 12.3 Power Amplifier Efficiency Enhancement
      4. 12.4 Techniques for Linearity Enhancement
      5. 12.5 Conclusions
      6. References
    2. Chapter 13: Cmos RF Power Amplifiers for Mobile Communications
      1. 13.1 Introduction
      2. 13.2 Challenges
      3. 13.3 Low Supply Voltage
      4. 13.4 Average Efficiency, Dynamic Range, and Linearity
      5. 13.5 Polar Modulation
      6. 13.6 Distortion in a Polar-Modulated POwer Amplifier
      7. 13.7 Design And Implementation of a Polar-Modulated Power Amplifier for Gsm-Edge
      8. 13.8 Conclusions
      9. References
    3. Chapter 14: Digitally Assisted RF Architectures: Two Illustrative Designs
      1. 14.1 Introduction
      2. 14.2 Cartesian Feedback: the Analog Problem
      3. 14.3 Digital Assistance for Cartesian Feedback
      4. 14.4 Multipliers, Squarers, Mixers, and Vgas: The Analog Problem
      5. 14.5 Digital Assistance for Analog Multipliers
      6. 14.6 Summary
      7. Appendix: Stability Analysis for Cartesian Feedback Systems
      8. References
  10. Part IV: Digital Signal Processing for RF Transceivers
    1. Chapter 15: RF Impairment Compensation for Future Radio Systems
      1. 15.1 Introduction and Motivation
      2. 15.2 Typical RF Impairments
      3. 15.3 Impairment Mitigation Principles
      4. 15.4 Case Studies in I/Q Imbalance Compensation
      5. 15.5 Conclusions
      6. References
    2. Chapter 16: Techniques for the Analysis of Digital Bang-Bang PLLs
      1. 16.1 Introduction
      2. 16.2 Digital Bang-Bang Pll Architecture
      3. 16.3 Analysis of the Nonlinear Dynamics of the BBPLL
      4. 16.4 Analysis of the BBPLL with Markov Chains
      5. 16.5 Linearization of the BBPLL
      6. 16.6 Comparison of Measurements and Models
      7. References
    3. Chapter 17: Low-Power Spectrum Processors for Cognitive Radios
      1. 17.1 Introduction
      2. 17.2 Paradigm Shift from SDR to CR
      3. 17.3 Challenge and Trends in Rfic/System
      4. 17.4 Analog Signal Processing
      5. 17.5 Spectrum Sensing
      6. 17.6 Multi-Resolution Spectrum Sensing
      7. 17.7 Mrss Performance
      8. 17.8 Conclusions
      9. References
  11. Index