Modern VLSI Design: System-on-Chip Design, Third Edition

4Combinational Logic Networks

Highlights:

Layouts for logic networks.

Delay through networks.

Power consumption.

Switch logic networks.

Combinational logic testing.

4.1 Introduction

This chapter concentrates on the design of combinational logic functions. Building a single inverter doesn’t justify a multi-billion VLSI fabrication line. We want to build complex systems of many combinational gates. To do so, we will study basic aspects of hierarchical design and analysis, especially delay and power analysis. The knowledge gained about fabrication is important for combinational logic design—technology-dependent parameters for minimum size, spacing, and parasitic values largely determine how big a gate circuit must be and how fast ...