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Make: FPGAs by David Romano

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Chapter 4. Testing 1, 2, 3, 4

The HDL Test Bench

In the world of SoC design, the nature and methods of circuit verification is a topic that could fill volumes, let alone this entire book. We have already seen in the previous chapters how a simple simulation can be used to check the overall health of our designs. But what happens when we move beyond a simple counter design that we’ve created to using complex, off-the-shelf IP, like a communication controller or microcontroller? How do we test something like this, and how can we use simulation to help us understand its operation? Fortunately for us, a lot of clever engineers have spent a lot of time coming up with innovative ways to accomplish these goals. The test bench is one of these innovations, ...

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