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Low-Voltage SOI CMOS VLSI Devices and Circuits

Book Description

A practical, comprehensive survey of SOI CMOS devices and circuits for microelectronics engineers

The microelectronics industry is becoming increasingly dependent on SOI CMOS VLSI devices and circuits. This book is the first to address this important topic with a practical focus on devices and circuits. It provides an up-to-date survey of the current knowledge regarding SOI device behaviors and describes state-of-the-art low-voltage CMOS VLSI analog and digital circuit techniques.

Low-Voltage SOI CMOS VLSI Devices and Circuits covers the entire field, from basic concepts to the most advanced ideas. Topics include:

* SOI device behavior: fundamental and floating body effects, hot carrier effects, sensitivity, reliability, self-heating, breakdown, ESD, dual-gate devices, accumulation-mode devices, short channel effects, and narrow channel effects

* Low-voltage SOI digital circuits: floating body effects, DRAM, SRAM, static logic, dynamic logic, gate array, CPU, frequency divider, and DSP

* Low-voltage SOI analog circuits: op amps, filters, ADC/DAC, sigma-delta modulators, RF circuits, VCO, mixers, low-noise amplifiers, and high-temperature circuits

With over 300 references to the state of the art and over 300 important figures on low-voltage SOI CMOS devices and circuits, this volume serves as an authoritative, reliable resource for engineers designing these circuits in high-tech industries.

Table of Contents

  1. Cover Page
  2. Title Page
  3. Copyright
  4. Contents
  5. Preface
  6. Acknowledgments
  7. About the Authors
  8. 1: Introduction
    1. 1.1 EVOLUTION OF CMOS VLSI
    2. 1.2 SOI VERSUS BULK
    3. 1.3 LOW-VOLTAGE SOI VLSI
    4. 1.4 OBJECTIVES
    5. REFERENCES
  9. 2: SOI CMOS Devices–Part I
    1. 2.1 BASIC SOI TECHNOLOGY
    2. 2.2 BACK GATE BIAS EFFECTS
    3. 2.3 SHORT CHANNEL EFFECTS
    4. 2.4 NARROW CHANNEL EFFECTS
    5. 2.5 MOBILITY
    6. 2.6 FLOATING BODY EFFECTS
    7. 2.7 SUBTHRESHOLD BEHAVIOR
    8. 2.8 IMPACT IONIZATION
    9. 2.9 BREAKDOWN
    10. 2.10 TRANSIENT-INDUCED LEAKAGE
    11. 2.11 HISTORY EFFECTS
    12. 2.12 SELF-HEATING
    13. 2.13 TRANSIENT BEHAVIORS
    14. 2.14 SUMMARY
    15. REFERENCES
    16. Problems
  10. 3: SOI CMOS Devices–Part II
    1. 3.1 HOT CARRIERS
    2. 3.2 ACCUMULATION-MODE DEVICES
    3. 3.3 DOUBLE GATE
    4. 3.4 DTMOS
    5. 3.5 SCALING TRENDS
    6. 3.6 SINGLE ELECTRON TRANSISTORS (SET)
    7. 3.7 ELECTROSTATIC DISCHARGE (ESD)
    8. 3.8 TEMPERATURE DEPENDENCE
    9. 3.9 SENSITIVITY
    10. 3.10 RADIATION EFFECTS
    11. 3.11 SUMMARY
    12. REFERENCES
    13. Problems
  11. 4: Fundamentals of SOI CMOS Circuits
    1. 4.1 BASIC CIRCUIT ISSUES
    2. 4.2 FLOATING BODY EFFECTS
    3. 4.3 LOW-VOLTAGE CIRCUIT TECHNIQUES
    4. 4.4 DTMOS CIRCUITS
    5. 4.5 MTCMOS CIRCUITS
    6. 4.6 NOISE
    7. 4.7 SELF-HEATING
    8. 4.8 ESD CIRCUITS
    9. 4.9 SYSTEM-ON-A CHIP (SOC) TECHNOLOGY
    10. 4.10 SUMMARY
    11. REFERENCES
    12. Problems
  12. 5: SOI CMOS Digital Circuits
    1. 5.1 STATIC LOGIC CIRCUITS
    2. 5.2 DYNAMIC LOGIC CIRCUITS
    3. 5.3 DRAM
    4. 5.4 SRAM
    5. 5.5 CAM
    6. 5.6 GATE ARRAY
    7. 5.7 CPU
    8. 5.8 EMBEDDED MEMORY
    9. 5.9 MULTIPLIER AND DSP
    10. 5.10 FREQUENCY DIVIDER
    11. 5.11 SUMMARY
    12. REFERENCES
    13. Problems
  13. 6: SOI CMOS Analog Circuits
    1. 6.1 SOI OP AMPS
    2. 6.2 FILTERS
    3. 6.3 ADC AND DAC
    4. 6.4 SIGMA-DELTA ADC
    5. 6.5 RF CIRCUITS
    6. 6.6 LOW-NOISE AMPLIFIER (LNA)
    7. 6.7 MIXER
    8. 6.8 VOLTAGE-CONTROLLED OSCILLATOR-VCO
    9. 6.9 HIGH-TEMPERATURE CIRCUITS
    10. 6.10 SUMMARY
    11. REFERENCES
    12. Problems
  14. 7: PD SOI-Technology SPICE Models
    1. 7.1 PD SOI SPICE MODEL
    2. 7.2 KINK EFFECTS
    3. 7.3 HYSTERESIS BEHAVIOR
    4. 7.4 TRANSIENT BEHAVIOR
    5. 7.5 STATIC LOGIC CIRCUIT
    6. 7.6 DYNAMIC LOGIC CIRCUIT
    7. 7.7 SRAM CRITICAL PATH
    8. 7.8 SUMMARY
    9. REFERENCES
    10. Problems
  15. Index