Itanium Rising: Breaking Through Moore's Second Law of Computing Power

In Summary

• Early RISC processors first began exposing ILP. With nonstalling loads and exposed branch latencies, the role of the compiler in performance began to increase. As the RISC era progressed, instruction scheduling became increasingly important to performance.

• HP and Intel co-developed the Itanium architecture. The result is a high-performance, parallel, 64-bit architecture that has the performance headroom to grow in the future and can be priced at a level to ensure its widespread adoption. The Itanium architecture fulfills both of these promises and is likely to become pervasive very quickly.

• The newly developed EPIC architecture provides much higher levels of ILP without unacceptable increases in hardware complexity. EPIC achieves such ...