Untapped Parallelism in RISC
Most of the RISC machines today are what we call '4-issue' processors. This means that in theory they can do a maximum of four things in parallel. However, because of the way the architecture of processor is set up—the hardware on the chip, and the software that controls it—this level of parallelism is rarely reached on a regular basis.
All CISC and RISC-based machines are based on the model of a Von Neumann engine. This engine is the basic computer model where the processing must appear to be done sequentially. One instruction is completed, and only then is the next picked up, and so on and so forth. It's a purely sequential architecture, and because it is set up like that, it's difficult to do anything in parallel. ...
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