Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

List of Figures

Figure 1-1 Architecture and implementation of the piano

Figure 1-2 Computation of squares by tabular differences

Figure 1-3 SQUARES program for Itanium architecture

Figure 2-1 Basic computer structure

Figure 2-2 Memory organization

Figure 2-3 Memory as an array

Figure 2-4 Instruction execution

Figure 2-5 Itanium information units

Figure 3-1 Stepwise development using programming environment tools

Figure 3-2 SQUARES listing file (GNU)

Figure 3-3 Information from a link map for SQUARES (gcc)

Figure 3-4 Output from the nm command for SQUARES

Figure 4-1 Itanium instruction bundle format

Figure 4-2 Itanium instruction bit-field layout

Figure 4-3 HEXNUM: An illustration of arithmetic instructions

Figure 4-4 Itanium 2 system cache relationships

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